Notes on Verilog programming

Jonathan Jacky, 2006 -- 2007, revised May 2008: add link to recent MRFM project page.

I recently learned Verilog to program an FPGA with digital filters for a project (also here and here).

There are important differences between Verilog (or any hardware description language) and conventional (software only) programming:

• Distinction between simulation and synthesis, with different programming styles and tool chains for each.
• Distinction between structural and behavioral code --- but the same functionality can be expressed either way.
• Parallel execution at the module, block, and statement level.

I use Icarus and GTKWave for simulation, Quartus for synthesis.

In embedded systems, the advantage of using FPGAs and Verilog (or any programmable hardware and HDL), rather than a conventional processor and programming language, is parallelism and simplicity. With FPGAs and Verilog you can always add more functions in parallel with no penalty in speed or complexity: just use more modules, more pins, and (if needed) more (or bigger) FPGA chips. All modules run in parallel at full speed; their execution does not share a single processor; it is true concurrency, not interleaving concurrency as on one or a few processors. There is no need for any processes or threads, nor any need to synchronize among them, nor any need for an operating system at all.

The biggest difference from conventional programming is not the language, but the development method. We have only very limited ability to observe and debug synthesized Verilog code, compared to a conventional program. We must do most debugging in simulation. Simulation requires a testbed that simulates the input signals. The usual way to obtain this is to also write it in Verilog. But simulation may not be conclusive; the same code can behave differently in simulation than when synthesized, due to limitations in the testbed and quirks in the tools.

There don't seem to be any classic books (like K&R for C) so the beginning Verilog programmer has to build on understanding gained from previous experience. Two kinds are needed.

Software experience helps us understand:

• Behavioral code. Here Verilog is similar to most programming languages, except for the parallelism. Verilog syntax is similar to C. For example, see this mostly behavioral code
• Binding. Verilog binding of wires to ports is similar to the binding of arguments to parameters in a conventional programming language.
• Instances. Verilog modules and instances are similar to classes and instances in object-oriented programming. Multiple instances of the same Verilog module can exist at the same time.

• Structural code. Here Verilog is a textual representaton of a circuit diagram, including the parallelism. Each Verilog module describes a kind of circuit, each instance of a module is another distinct example of that circuit (that occupies actual real estate in the device when synthesized). For example, compare this structural code to the block diagram labeled Heterodyne control on this page.
• Combinational logic and data flow. Verilog continuous assigment to wires.
• Clocked logic and synchronization. Verilog procedural assignment to registers.

My impression is that, instead of books, experienced Verilog programmers mostly refer to examples (etc.) and short references like these:

References

EE382 Verilog Manual by Y.N. Patt (short but very helpful)
http://users.ece.utexas.edu/~patt/04s.382N/tutorial/verilog_manual.html

Verilog@Everything2.com (another short tutorial)
http://everything2.com/index.pl?node=Verilog

CSCI Computer Architecture Handbook on Verilog HDL (somewhat longer)
http://www.csl.cornell.edu/courses/ee475/verilog-manual.html

Verilog HDL On-line Quick Reference
http://www.sutherland-hdl.com/on-line_ref_guide/vlog_ref_body.html

Verilog Quick Reference (extremely terse)
http://www.asic-world.com/verilog/vqref1.html

Verilog HDL Quick Reference Card, Qualis Design Corp. (terse, PDF)
http://www.ee.lsu.edu/v/refcard.pdf

Verilog interview questions and answers
http://asic.co.in/Index_files/verilog_interview_questions2.htm

"Verilog", Chapter 9, pages 207 -- 235 in Thimmannagari, Chandra M. R., CPU Design : Answers to Frequently Asked Questions. New York : Springer, 2005 (has many short but nontrivial examples)

The most interesting full-length book I've seen is

Kilts, Steve, Advanced FPGA Design: Architecture, Implementation, Optimization. Wiley, 2007